1. Field of the Invention
This invention relates to a system for reduction in power dissipation for universal, asynchronous transmitter/receivers (UART) applications when in the standby mode.
2. Brief Description of the Prior Art
UARTs are interface circuits, generally in the form of integrated circuit chips, which are disposed between a data providing circuit, such as, for example, a personal computer (PC) and a modem to provide parallel to serial and serial to parallel data conversion. UARTs generally include an oscillator and a crystal to synchronize data conversion and therefore consume power when idle as well as when providing their data conversion function. It is desired to minimize the power dissipation of such UARTs when there is no data transfer at both serial and parallel ports, this feature being particularly useful in battery operated systems wherein power conservation is of great significance.
The prior art has attempted to minimize power consumption in UARTs by providing a UART having a sleep power mode wherein the power is turned off when in the standby mode (no data transfer). While this type of operation conserves power, it presents the problem that the system requires wake up time (time for transition out of this sleep mode and into an operational mode) to be fully operational and to operate at full speed. Accordingly, either a delay in operation is required or, if there is no delay, there is the possibility that data will be lost and/or mutilated during the wake up period (especially when the transfer rate is at high speed, such as, for example, in the megabaud range). Neither possibility is desirable and, often, neither possibility is acceptable.